July 21, 2018
Ti CD4046BE - CMOS PLL / Oscillator : weekend die-shot
We used to think that 4000-series or 7400-series standard logic are all relatively simple ICs. Ti CD4046BE is probably the most complex of these - It's a PLL with internal VCO and even zener voltage reference for external voltage regulator. It could still be useful today, if you're fine with it's 1.4Mhz frequency limit.Die size 2271x2007 µm.

Metal etch photos are added
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July 20, 2018
July 15, 2018
BB OPA134PA - FET input opamp : weekend die-shot
Update: It is suggested that this is likely a fake (remarked) chip. Chip on the image is TL051.BB OPA134PA is a trimmed, low-noise low-distortion (0.00008%) opamp with FET input stage.
Die size 1592x1077 µm.

July 1, 2018
Microchip MCP6024 - CMOS R2R 10MHz opamp : weekend die-shot
Microchip MCP6024 is a CMOS R2R 10 MHz opamp with input offset trimmed down to 0.5mV.2 identical dies inside plastic package.

June 30, 2018
June 1, 2018
Ti SE555P - 1996 version in glass-filled DIP package: weekend die-shot
Some time ago we've seen Ti's 555 from 2006. This is an older one, from 1996. Die here is slightly larger, transistors are square vs round and no pads in the middle of the chip.Die size 1000x1020 µm.

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May 25, 2018
Analog Devices AD9361 - when microchips are more profitable than drugs
When Analog Devices released their SDR transciever AD9361 in 2013 - it was a revolution in digital radio. SDR's were there before, but only now you can have it all: 2 channels for TX and RX with onboard 12-bit DAC/ADCs with 56MHz of RF simultanious bandwidth, local oscillators, mixers and LNA - all working in the range from 70 (TX from 47) to 6000Mhz. Using AD9361 out of the box one could implement almost any useful digital radio, with the rare exceptions of UWB and 60GHz. You only need to add data source/sink (which is still often an FPGA), external filters and PA if your task requires it.Finally I was able to take a look inside and peek at manufacturing cost of a microelectronic device with such an exceptional added value.
After decapsulation we see 4336x4730 µm 65nm die. On top metal you can notice PLL's inductors and datecode - chip was somewhat ready 2 years before introduction:

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