December 26, 2016

ST USBLC6-2 - USB protection chip : weekend die-shot

ST USBLC6-2 has 4 diodes and 1 Zener to protect your USB gear.
Die size 1084x547 µm.

December 18, 2016

LM338K - 5A LDO in TO-3 : weekend die-shot

Die size 1834x1609 µm.

You can see why this giant package is nearly obsolete these days (it's been around since 1955) - tiny crystal on a large steel case is largely limited by steel thermal conduction. Modern packages with copper base could do better with much smaller packages.

December 18, 2016

DTA143ZK - PNP BJT with bias resistors : weekend die-shot

Comparing to Infinion BCR185W there are no even bias resistors under the pads, hence larger die size (426x424 µm).

December 15, 2016

LM1813 - early anti-skid chip : weekend die-shot

LM1813 - anti-skid chip, was the largest analog die National Semiconductor had built to date as of 1974. It was built as a custom for a brake system vendor to Ford Motor company for use in their pickup trucks.

Die size 2234x1826 µm.

Test chips on the wafer:

Thanks for the wafers goes to Bob Miller, one of designers of this chip.
December 3, 2016

CD4049 - hex CMOS inverter : weekend die-shot

On CD4049 you can see 6 independent inverters, each having 3 inverters connected in series with increasing gate width on each stage - this helps to achieve higher speed and lower input capacitance. Gate length is 6µm, so it is probably the slowest CMOS circuit one can ever see. Gates are metal (i.e. not self-aligned silicon) which are again the slower type at that time.

Die size 722x552 µm.

November 28, 2016

JCST CJ431 : weekend die-shot

CJ431 is another implementation of 431 shunt voltage reference manufactured by Jiangsu Changjiang Electronics Technology (JCST).
Die size 620x631 µm.

November 13, 2016

Infineon BCR185W - PNP BJT with bias resistors : weekend die-shot

Infineon BCR185W is a 0.1A PNP BJT. Bias resisors are 10 kΩ and 47 kΩ according to datasheet.
Die size 395x285 µm.