ZeptoBars - RSS feed http://zeptobars.com/en/ Microelectronics. Die-shots. Artificial intelligence. Lasers. en-us Tue, 10 Jun 2006 04:00:00 GMT Fri, 06 May 16 10:18:26 +0300 webmaster@zeptobars.com 120 10 <![CDATA[Maxim ds2401z - serial number chip : weekend die-shot]]> http://zeptobars.com/en/read/Dallas-semiconductor-maxim-ds2401z Right at the center of the die you can see 64-bit laser-trimmed ROM. Die size 1346x686 µm.


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Tue, 03 May 16 02:29:07 +0300
<![CDATA[ST TL072 - dual JFET opamp : weekend die-shot]]> http://zeptobars.com/en/read/ST-TL072-JFET-dual-opamp

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Sat, 16 Apr 16 20:30:43 +0300
<![CDATA[NXP/Philips BC857BS - dual pnp BJT : weekend die-shot]]> http://zeptobars.com/en/read/nxp-philips-bc857bs-dual-pnp-bjt Size of each die is 285x259 µm.


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Sat, 16 Apr 16 05:35:54 +0300
<![CDATA[ST TS971 : weekend die-shot]]> http://zeptobars.com/en/read/ST-TS971-R2R-opamp-SOT23 Die size 1079x799 µm.


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Sun, 03 Apr 16 11:40:26 +0300
<![CDATA[NEC NE3510M04 - RF HJ-FET : weekend die-shot]]> http://zeptobars.com/en/read/nec-NE3510M04-rf-HJ-FET-nmos

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Fri, 01 Apr 16 10:13:19 +0300
<![CDATA[ST TS321 - generic SOT23 opamp : weekend die-shot]]> http://zeptobars.com/en/read/ST-TS321-SOT23-opamp-LM358A-LM324 Die size 1270x735 µm.


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Sat, 26 Mar 16 11:18:25 +0300
<![CDATA[National Semiconductor LMC555 : weekend die-shot]]> http://zeptobars.com/en/read/national-semiconductor-LMC555

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Tue, 22 Mar 16 11:18:58 +0300
<![CDATA[ GD32F103CBT6 - Cortex-M3 with serial flash : weekend die-shot]]> http://zeptobars.com/en/read/GD32F103CBT6-mcm-serial-flash-Giga-Devices


Giga Devices was a serial flash manufacturer for quite some time. When they launched their ARM Cortex M3 lineup (with some level of binary compatibility to STM32) - instead of going conventional route of making numerous dies with different flash and SRAM sizes they went for SRAM&logic die and separate serial flash die. How this could work fast enough? Keep reading :-) At least ESP8266 already taught us that executing code from serial flash and reaching acceptable speed is not impossible.

Use of serial flash allows Giga Devices to increase maximum flash size in their microcontrollers quite a bit (currently they have up to 3MiB) and to save quite a bit on ARM licensing fees (if they are paying "per die design").


Die has 110 pads, 9 of which are used by a flash die. GD32F103CBT6 is in TQFP48 package - which again suggests that this die is universal and also used in higher pin count models. Die size 2889x3039 µm.

Logo:


ADC capacitor bank:


After etching to poly level we clearly see that there is no flash on the die:


SRAM sizes are 32KiB in each largest block (128 KiB total) - stores code, which means first 128KiB could be accessed faster than typical flash. GD32 chips with 20Kb of SRAM or less have no more than 128KiB of flash, so all flash content is served from SRAM. This might also mean that startup time is slower than one would expect. With this SRAM mirroring it is not surprising that GD32 is beating STM32 in performance even on the same frequency and loosing in idle & sleep power consumption. Consumption at full load is lower than STM32 due to better (smaller) manufacturing technology.

2 smaller blocks are 10KiB each and are likely to be user-accessible SRAM.
4 smallest blocks closest to the synthesized logic are 512B each.

SRAM has cell size 2.04 µm², which is ~110nm. Scale 1px = 57nm:


Standard cells:


Low power standard cells:


Flash die:

Flash die size: 1565x1378 µm.

PS. Thanks for the chips go to dongs from irc.]]>
Sat, 12 Mar 16 15:00:49 +0300
<![CDATA[ST TS951 - 3 MHz BiCMOS R2R opamp : weekend die-shot]]> http://zeptobars.com/en/read/ST-TS951-BiCMOS-R2R-opamp

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Tue, 09 Feb 16 10:33:53 +0300
<![CDATA[S9014 - low noise npn BJT : weekend die-shot]]> http://zeptobars.com/en/read/S9014-low-noise-bjt-npn

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Tue, 09 Feb 16 10:31:12 +0300